- Define verification strategy as per system requirements. Define testbench architecture, verification plan, and interact with design teams for feature extraction
- Perform analog/real-number behavioral modelling and Validation
- Perform analog netlist extraction for digital-mixed signal testbench
- Perform execution of verification plans, which includes AMS system-level verification on re-used UVM-based testbench
- Support technical communication with customers and participate in design reviews; ensure schedule adherence and interactive problem solving
Who we are looking for
- Master’s or Bachelor’s degree in Electrical Engineering with emphasis in Design Verification or a similar specialty, as well as proven industry experience
- Expertise in block- and system-level verification with reusable components, testbench architecture and verification planning
- Experience with analog behavioral modelling with System Verilog RNM and Verilog-AMS
- Experience with relevant EDA tools and familiarity with scripting languages (e.g. Python, SKILL)
- Excellent team player; calm professional demeanor and excellent listening skills, ability to organize and prioritize work
- Fluency in English
Please contact Stefanie Kleierl for further information via STEFANIE.KLEIERL@AMS-OSRAM.COM or +49 (941) 8501391.