Key Responsibility (主要职责)：

• The front-end/back-end verification of IC projects, mainly focusing on mixed-signal chip level verification; 
• Verification planning, review, and architecture definition; 
• Development and implementation of verification test benches; 
• Development of verification components, using in UVM and other mainstream verification methodology; 
• Development of direct and constrained
• Random stimulus, and understanding functional and assertion coverage results; 
• Identifying cost-effective and innovative verification techniques; 
• Experience with assertion-based verification and automated test case/scenario generation (e.g., Perspec) is a plus. 

Who we are looking for

• BS with 8+ years or MS with 5+ years in ASIC verification; 
• Familiar with chip development/verification process, proficient in verification related EDA tools, skilled in UVM; 
• Familiar with the commonly used IP, such as UART/SPI/I2C/JTAG,etc.;
• Proficient in SystemVerilog hardware design language, familiar with one or more of C/C++ modeling languages, familiar with python/ perl scripting languages; 
• Can independently build verification platform,complete IP /Chip level verification, test point decomposition, code/function coverage analysis and other work. -Fluent English in reading, writing and speaking. 

Prefer Experience:

• Experience in FPGA prototype verification /emulation verification; 
• Familiar with optical sensor chip system; 
• Familiar with algorithm of optical/image sensor. 

Please contact Lin Huang for further information via DAISY.HUANG@AMS-OSRAM.COM or +86 (755) 33229167.